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ISDB-T 1-Segment Tuner
Table 7. MODE Register
BIT NAME
BIT LOCATION
(0 = LSB)
DEFAULT
FUNCTION
Bypass 3rd-stage RFVGA.
RFVB
7
0
0 = Enables 3rd-stage RFVGA.
1 = Disables the 3rd-stage RFVGA.
Bypass integrated RF filter.
RFFB
6
0
0 = Enables optional RF filter.
1 = Disables optional RF filter.
Selects between high-side and low-side LO injection.
HSLS
5
0
1 = Low-side injection.
0 = High-side injection.
X
4, 3, 2, 1, 0
0
Factory use only. Must be programmed to 0 upon power-up.
Table 8. R-Divider MSB Register
BIT NAME
R[8:1]
BIT LOCATION
(0 = LSB)
7, 6, 5, 4, 3, 2,
1, 0
DEFAULT
00111111
FUNCTION
Sets the PLL reference divider (R) number. Default R divide value is 126
decimal. R can range from 16 to 511 decimal.
Note: When changing R-divider value, both registers R-Divider MSB and R-Divider LSB must be loaded as they are double buffered.
Table 9. R-Divider LSB/CP Register
BIT NAME
BIT LOCATION
(0 = LSB)
DEFAULT
FUNCTION
Sets the charge-pump current.
00 = 1.5mA.
CP[1:0]
7, 6
00
01 = 2mA.
10 = 2.5mA.
11 = 3mA.
X
5
0
Factory use only. Must be programmed to 0 upon power-up.
Disable RF Detector
DRFD
4
1
0 = Enables the wideband RF overload detector.
1 = Disables the wideband RF overload detector.
Sets the RF overload detector attack point (subtract 6dB to each if PDIQ = 0).
00 = +37dB relative to IF attack point setting.
RFDA[1:0]
3, 2
11
01 = +34dB relative to IF attack point setting.
10 = +31dB relative to IF attack point setting.
11* = +28dB relative to IF attack point setting.
* Only 11 is factory tested.
X
1
1
Factory use only. Must be programmed to 1 upon power-up.
R0 0 0 LSB of reference divider number
Note: When changing R-divider value, both registers R-Divider MSB and R-Divider LSB must be loaded as they are double buffered.
14
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